september 1996 ndt014 n -channel enhancement mode field effect transistor general description features _________________________________________________________________________________________________________ absolute maximum ratings t a = 25c unless otherwise noted symbol parameter ndt014 units v dss drain-source voltage 60 v v gss gate-source voltage 20 v i d drain current - continuous (note 1a) 2.7 a - pulsed 10 p d maximum power dissipation (note 1a) 3 w (note 1b) 1.3 (note 1c) 1.1 t j ,t stg operating and storage temperature range -6 5 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 42 c/w r q jc thermal resistance, junction-to-case (note 1) 12 c/w * order option j23z for cropped center drain lead. ndt014 rev. c1 power sot n-channel enhancement mode power field effect transistors are produced using fairchild's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance and provide superior switching performance . these devices are particularly suited for low voltage applications such as dc motor control and dc/dc conversion where fast switching, low in-line power loss, and resistance to transients are needed. 2.7 a, 6 0v. r ds(on ) = 0.2 w @ v gs = 10v. high density cell design for extremely low r ds(on) . high power and current handling capability in a widely used surface mount package. d d s g d s g ? 1997 fairchild semiconductor corporation
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 60 v i dss zero gate voltage drain current v ds = 60 v, v gs = 0 v 25 a v ds = 48 v, v gs = 0 v, t j =125c 250 a i gssf gate - body leakage, forward v gs = 20 v, v ds = 0 v 100 na i gssr gate - body leakage, reverse v gs = -20 v, v ds = 0 v -100 na on characteristics (note 2 ) v gs (th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 1.6 a 0.18 0.2 w g fs forward transconductance v ds = 2 5 v, i d = 1.6 a 2 s dynamic characteristics c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1.0 mhz 155 pf c oss output capacitance 60 pf c rss reverse transfer capacitance 15 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd =30 v, i d = 10 a, v gen = 10 v, r gen = 24 w 10 20 ns t r turn - on rise time 64 100 ns t d(off) turn - off delay time 10 20 ns t f turn - off fall time 10 20 ns q g total gate charge v ds = 48 v, i d = 10 a, v gs = 10 v 5 11 nc q gs gate-source charge 1.2 3.1 nc q gd gate-drain charge 2 5.8 nc ndt014 rev. c1
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current 2.7 a i sm maximum pulsed drain-source diode forward current 22 a v sd drain-source diode forward voltage v gs = 0 v, i s = 2.7 a (note 2 ) 0.95 1.6 v t rr reverse recovery time v gs = 0 v, i f = 10 a, di f /dt = 100 a/s 140 ns notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. p d ( t ) = t j - t a r q j a ( t ) = t j - t a r q j c + r q c a ( t ) = i d 2 ( t ) r d s ( o n ) t j typical r q ja using the board layouts shown below on 4.5"x5" fr-4 pcb in a still air environment : a. 42 o c/w when mounted on a 1 in 2 pad of 2oz copper. b. 95 o c/w when mounted on a 0.066 in 2 pad of 2oz copper. c. 110 o c/w when mounted on a 0.0123 in 2 pad of 2oz copper. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. ndt014 rev. c1 1a 1b 1c
ndt014 rev. c1 0 1 2 3 4 0 2 4 6 8 v , drain-source voltage (v) i , drain-source current (a) v = 10v gs ds d 4.5 5.0 8.0 7.0 6.5 6.0 5.5 -50 -25 0 25 50 75 100 125 150 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) v = 10v gs i = 2.7a d -50 -25 0 25 50 75 100 125 150 0.7 0.8 0.9 1 1.1 1.2 t , junction temperature (c) gate-source threshold voltage j v , normalized th v = v ds gs i = 250a d 0 2 4 6 8 10 0.5 1 1.5 2 2.5 i , drain current (a) drain-source on-resistance d r , normalized ds(on) v = 5.5v gs 10 8.0 7.0 6.5 6.0 0 2 4 6 8 10 0 0.5 1 1.5 2 2.5 3 i , drain-current(a) d r a i n - s o u r c e o n - r e s i s t a n c e d v = 10 v gs 25c -55c t = 125c j r , normalized ds(on) typical electrical characteristics figure 1. on-region characteristics. figure 2. on-resistance variation wit h gate voltage and drain current. figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with drain current and temperature. figure 5. transfer characteristics. figure 6. gate threshold variation with temperature. 2 4 6 8 10 0 2 4 6 8 10 v , gate to source voltage (v) i , drain current (a) v = 10v ds gs d t = -55c j 25c 125c
ndt014 rev. c1 -50 -25 0 25 50 75 100 125 150 0.9 0.95 1 1.05 1.1 1.15 t , junction temperature (c) drain-source breakdown voltage bv , normalized dss j i = 250a d 0.2 0.4 0.6 0.8 1 1.2 1.4 0.001 0.01 0.1 0.5 1 5 10 v , body diode forward voltage (v) i , reverse drain current (a) t = 125c j 25c -55c v = 0v gs sd s 0 1 2 3 4 5 6 0 3 6 9 12 15 q , gate charge (nc) v , gate-source voltage (v) g gs i = 2.7a d v = 10v ds 20v 40v 0.1 0.2 0.5 1 2 5 10 20 50 10 20 30 50 100 200 300 400 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss g d s v dd r l v v in out v gs dut r gen figure 7. breakdown voltage variation with temperature. figure 8. body diode forward voltage variation with current and temperature. figure 9. capacitance characteristics. figure 10. gate charge characteristics. figure 11. switching test circuit. figure 12. switching waveforms. typical electrical characteristics (continued) 10% 50% 90% 10% 90% 90% 50% v in v out on off d(off) f r d(on) t t t t t t inverted 10% pulse width
ndt014 rev. c1 0 2 4 6 8 10 0 1 2 3 4 i , drain current (a) g , transconductance (siemens) t = -55c j 25c d fs v = 10v ds 125c 0.1 0.2 0.5 1 2 5 10 30 60 100 0.01 0.05 0.1 0.5 1 2 5 10 20 v , drain-source voltage (v) i , drain current (a) d dc rds(on) limit ds 100ms 1s 10s 10ms 1ms 100us v = 10v single pulse r = 42 c/w t = 25c gs a q ja o figure 13. transconductance variation with drain current and temperature. figure 14. maximum safe operating area. typical electrical characteristics (continued) figure 15 . transient thermal response curve . note: thermal characterization performed using the conditions described in note 1c. transient thermal response will change depending on the circuit board design. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = see note 1 c q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2
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